diff --git a/srcpkgs/qt5-webkit/patches/mips-isa-32.patch b/srcpkgs/qt5-webkit/patches/mips-isa-32.patch
new file mode 100644
index 00000000000..cfa3b72296c
--- /dev/null
+++ b/srcpkgs/qt5-webkit/patches/mips-isa-32.patch
@@ -0,0 +1,14 @@
+--- Source/JavaScriptCore/assembler/MacroAssemblerMIPS.h	2019-08-15 20:56:14.000000000 +0200
++++ Source/JavaScriptCore/assembler/MacroAssemblerMIPS.h	2020-03-04 10:43:29.468482593 +0100
+@@ -315,11 +315,7 @@
+ 
+     void countLeadingZeros32(RegisterID src, RegisterID dest)
+     {
+-#if WTF_MIPS_ISA_AT_LEAST(32)
+         m_assembler.clz(dest, src);
+-#else
+-        static_assert(false, "CLZ opcode is not available for this ISA");
+-#endif
+     }
+ 
+     void lshift32(RegisterID shiftAmount, RegisterID dest)
diff --git a/srcpkgs/qt5-webkit/template b/srcpkgs/qt5-webkit/template
index c7c09c1376e..8f7e963aa28 100644
--- a/srcpkgs/qt5-webkit/template
+++ b/srcpkgs/qt5-webkit/template
@@ -43,7 +43,7 @@ esac
 # some platforms need libatomic
 case "$XBPS_TARGET_MACHINE" in
 	ppc64*) ;;
-	armv6*|ppc*)
+	armv[56]*|ppc*)
 		makedepends+=" libatomic-devel"
 		LIBS+=" -latomic"
 		;;