void-packages/srcpkgs/llvm9/files/patches/llvm/llvm-005-ppc-lrint.patch
q66 3b9debee1c llvm9: add fixes for the powerpc backend
This fixes Rust with llvm9 on ppc32, so that we can finally switch
to it (llvm-006-bigpic.patch) - previously it would emit wrong
executables that segfault.

While at it, I'm adding an upstream backport that fixes incorrect
codegen for certain things such as Chromium.

[ci skip]
2019-11-05 13:30:54 +01:00

34 lines
2 KiB
Diff

From 97e36260709c541044f30092b420238511e13e5b Mon Sep 17 00:00:00 2001
From: Nemanja Ivanovic <nemanjai@ca.ibm.com>
Date: Mon, 28 Oct 2019 16:08:30 -0500
Subject: [PATCH] [PowerPC] Do not emit HW loop if the body contains calls to
lrint/lround
These two intrinsics are lowered to calls so should prevent the formation of
CTR loops. In a subsequent patch, we will handle all currently known intrinsics
and prevent the formation of HW loops if any unknown intrinsics are encountered.
Differential revision: https://reviews.llvm.org/D68841
---
.../Target/PowerPC/PPCTargetTransformInfo.cpp | 4 +
llvm/test/CodeGen/PowerPC/pr43527.ll | 75 +++++++++++++++++++
2 files changed, 79 insertions(+)
create mode 100644 llvm/test/CodeGen/PowerPC/pr43527.ll
diff --git a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
index 53c2f0f88d14..ad37e435fa36 100644
--- llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
+++ llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
@@ -331,8 +331,12 @@ bool PPCTTIImpl::mightUseCTR(BasicBlock *BB,
case Intrinsic::ceil: Opcode = ISD::FCEIL; break;
case Intrinsic::trunc: Opcode = ISD::FTRUNC; break;
case Intrinsic::rint: Opcode = ISD::FRINT; break;
+ case Intrinsic::lrint: Opcode = ISD::LRINT; break;
+ case Intrinsic::llrint: Opcode = ISD::LLRINT; break;
case Intrinsic::nearbyint: Opcode = ISD::FNEARBYINT; break;
case Intrinsic::round: Opcode = ISD::FROUND; break;
+ case Intrinsic::lround: Opcode = ISD::LROUND; break;
+ case Intrinsic::llround: Opcode = ISD::LLROUND; break;
case Intrinsic::minnum: Opcode = ISD::FMINNUM; break;
case Intrinsic::maxnum: Opcode = ISD::FMAXNUM; break;
case Intrinsic::umul_with_overflow: Opcode = ISD::UMULO; break;